1. Field
The following description relates to an apparatus and a method for adjusting bandwidth, and to, for example, a computing apparatus, a bandwidth scaler, and a method for adjusting bandwidth, in which the bandwidth of an external memory is dynamically scaled by activating or deactivating one or more of a plurality of input and output terminals provided in an external memory, based on a dynamic context of a processor.
2. Description of Related Art
A computing apparatus may include one or more processors and one or more external memories from which data is retrieved or to which data is transmitted from the processors. In order to execute applications that require processing of large amounts of data, an external memory is needed in addition to the processor. For example, the execution of applications involving image processing, audio processing, processing of three-dimensional (3D) graphics and the like, may require data transmission to and from an external memory, such as an off-chip memory that is coupled to a processor.
However, an off-chip memory bandwidth capacity may be limited by various factors. If the provided off-chip memory bandwidth cannot sustain the rate at which data transmission are required by the application, the performance of the processor may decline based on the available bandwidth. Further, an increase in the bandwidth of the external memory used by such a computing apparatus results in an increased input and output memory power, and results in an increased power consumption by the computing apparatus.